PhD on Emulation framework for self-aware neuromorphic system-on-chip architectures

Descrizione

PhD on Emulation framework for self-aware neuromorphic system-on-chip architectures Sintesi in italiano (traduzione automatica): Il progetto di dottorato, parte della rete REACT MSCA, si propone di sviluppare un'architettura di calcolo in memoria (CIM) energeticamente efficiente per l'apprendimento in tempo reale. Si cerca un candidato motivato per unirsi a un gruppo di ricerca sui sistemi di calcolo neuromorfici di nuova generazione. Il ruolo prevede lo sviluppo di un framework di emulazione avanzato, potenzialmente accelerato da FPGA, per architetture SoC neuromorfiche auto-consapevoli. Le mansioni principali includono la prototipazione rapida, l'esplorazione automatizzata dello spazio di design e il benchmarking tra tecnologie. È richiesta una laurea in ingegneria informatica o un campo correlato, con competenze in intelligenza artificiale, progettazione di circuiti e architettura dei computer. This PhD project, part of the REACT MSCA Doctoral Network, aims to develop an energy-efficient compute-in-memory (CIM) architecture using gain-cell memory for real-time edge learning, addressing power, latency, and memory bandwidth issues with reliable fault detection. Information As part of the REACT Marie Skłodowska-Curie Actions (MSCA) Doctoral Network initiative, we are seeking a highly motivated PhD candidate to join our research group working on next-generation neuromorphic computing systems. Inspired by the computational principles of the human brain, neuromorphic systems promise ultra-low-power intelligent processing through event-driven computation, on-chip learning, and compute-in-memory (CiM) paradigms that significantly reduce data movement between memory and processing units. However, evaluating such architectures at system scale remains a major challenge due to the limitations of conventional software simulation and existing device-level emulation platforms. This PhD project will develop an advanced emulation framework, potentially FPGA-accelerated, for self-aware neuromorphic system-on-chip (SoC) architectures, enabling fast and accurate exploration of emerging hardware and learning paradigms. The framework will support rapid prototyping, automated design-space exploration, and cross-technology benchmarking, providing new insights into the co-design of learning algorithms, memory technologies, and neuromorphic hardware architectures for future edge-intelligent systems. Particular emphasis will be placed on energy-efficient CiM-based architectures, adaptive processing mechanisms, and secure AI acceleration for next-generation embedded and edge platforms. Research objectives: Develop FPGA-based emulation and prototyping frameworks to accelerate the design-space exploration of neuromorphic SoC architectures leveraging emerging compute-in-memory (CiM) paradigms. Design energy-efficient, adaptive, and scalable neuromorphic SoC architectures integrating CiM technologies. Investigate security mechanisms for neuromorphic and AI accelerators, including side-channel resistance and secure on-chip learning. Implement, validate, and benchmark architectures using simulation environments and hardware prototypes. Collaborate with interdisciplinary research teams spanning artificial intelligence, circuit design, computer architecture, and embedded systems engineering. Annuncio in inglese. Fonte: Euraxess (Commissione europea).